1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device, and more particularly, to a double patterning technology using a hard mask that contains a material such as an amorphous carbon film, in which the pattern precision is degraded by oxidation.
2. Description of the Related Art
In a semiconductor device such as dynamic random access memory (DRAM), an active region that is to form a cell transistor is formed in an island-shaped pattern, and two cell transistors sharing one diffusion layer are formed in one active region. A bit line is connected to the diffusion layer (a central portion of the island-shaped active region), which is shared by the two cell transistors, a capacitive device such as a capacitor is connected to two diffusion layers (both end portions of the island-shaped active region), which are not shared.
In order to form the island-shaped active region, a hard mask layer, which is made of silicon oxide, silicon nitride or the like, is formed on a semiconductor substrate, a photoresist is patterned using a photolithography technology, a hard mask layer is processed into a mask using the resultant photoresist pattern, and a trench, which is to form a device-isolation region, is formed by etching the semiconductor substrate using the processed hard mask layer as a mask.
For example, FIG. 1 shows (a) a process of exposing a photoresist 13 to light by a photolithography technology using an exposure mask (reticle) 14, which has a rectangular island-shaped pattern 15I, (b1) a process of patterning the photoresist into an island-shaped photoresist pattern 13I by developing, and (c) a process of forming an island-shaped pattern 12I by etching a hard mask layer 12 using the island-shaped photoresist pattern 13I. As shown in the foregoing example, when the photoresist layer 13 is exposed to light using the reticle 14, which has the rectangular island-shaped pattern 15I, a phenomenon in which corners of the photoresist pattern 13I after development are rounded under the influence of diffracted light (see b2). When the hard mask layer 12 is patterned using the photoresist pattern 13I rounded in the corners, the shape is transferred (see FIG. 1 (c)), and furthermore, the pattern of the active region that is formed in the semiconductor substrate 11 has the same shape.
When the corners are rounded in this fashion, there is a problem in that the contact area to which the capacitive device is to be connected decreases. In particular, it is impossible to ensure a sufficient contact area when miniaturization is progressed.
Therefore, there is used a double patterning technology, which forms an island-shaped pattern by first processing a hard mask into a line pattern using a photoresist mask, which has a line pattern extending in a first direction, and dividing the hard mask layer in a second direction using a photoresist mask, which has a line pattern extending in the second direction across the first direction.
For example, FIG. 2 shows (a) a process of exposing a first photoresist 13 to light by a photolithography technology using a first exposure mask (first reticle) having a line pattern 15L, (b) a process of patterning the photoresist into a line-shaped photoresist pattern 13L by developing, (c) a process of forming a line-shaped pattern 12L by etching a hard mask layer 12 using the line-shaped photoresist pattern 13L as a mask, (d) a process of forming a second photoresist 16 and exposing the second photoresist 16 using a second exposure mask having a line pattern 18L that has an opening in a second direction across the first direction, (e) a process of patterning the photoresist into a line-shaped photoresist pattern 16L, and (f) a process of forming an island-shaped pattern 12I by etching the hard mask layer 12L using the line-shaped photoresist pattern 16L as a mask.
In this fashion, the use of the double patterning technology makes it possible to ensure a contact area by limiting the rounding of respective components that occur when the island-shaped pattern is formed by once exposing.
In recent days in which miniaturization is underway, exposure to light is performed using a short wavelength having a shallow focus depth. Thus, it is impossible to form a thick photoresist pattern that has a large film thickness. It is difficult to process a hard mask layer (an insulating film generally made of silicon oxide or silicon nitride) that has a large film thickness using only a photoresist pattern. Therefore, a technology that uses a hard mask film, such as an amorphous carbon film, which enables the formation of a thick film pattern using a thin photoresist mask, was developed (Japanese Patent Laid-Open Publication Nos. 2007-134668, 2005-039180 and Hei 6-216024).
FIG. 3 is a view depicting a method of forming an island-shaped active region in a semiconductor substrate by the double patterning technology using an amorphous carbon film. Here, FIG. 1 to FIG. 3 are views that are drawn by the inventor in order to illustrate the object of the invention, but are not the related art itself.
A pad oxide (thermal oxide: T-OX) film 2 having a thickness, for example, of 5 nm is formed on the surface of a semiconductor substrate (silicon substrate) 1, and a silicon nitride (SiN) film 3 having a thickness, for example, of 30 nm is formed by low-pressure CVD (LP-CVD). An amorphous carbon film (a-C film) 4 is formed over the SiN film 3 to a thickness of 200 nm by, for example, plasma CVD. In addition, a silicon nitride film 5 and a silicon oxide film 6 are formed at respective thicknesses of 60 nm and 40 nm by, for example, plasma CVD as a mask layer for etching the a-C film 4 (the silicon nitride film 5 and the silicon oxide film 6 due to plasma CVD are inscribed with P-SiN 5 and P-OX 6, respectively). In addition, a bottom anti-reflective coating (BARC) 7a and a silicon-containing BARC (Si-BARC) 8a, which are organic coatings, are formed thereon as an anti-reflective film, at respective thicknesses of 200 nm and 32 nm. Finally, a photoresist film (PR) 9a for ArF is applied to a thickness, for example, 150 nm. In sequence, the PR 9a is subjected to exposure to light using an ArF excimer laser and development so that a line pattern extending in the first direction is formed, thereby producing a structure shown in FIG. 3 (a).
In sequence, the anti-reflective films (Si-BARC 8a, BARC 7a) are etched using the PR 9 as a mask, and a P-OX 6 is additionally etched. While the P-SiN 5 acts as a protective film for the a-C film 4 when etching the P-OX 6, a small amount of the P-SiN 5 is etched by over-etching that is intended to reliably pattern the P-OX 6 in the wafer face. Afterwards, the residual anti-reflective film (BARC 7a) is removed by ashing, thereby producing a structure shown in FIG. 3 (b).
In sequence, as shown in FIG. 3 (c), anti-reflective films (Si-BARC 8b, BARC 7b) and a PR 9b are formed as in the above, and then the PR 9b is exposed to light and developed so that an opening pattern extending in the second direction across the first direction is formed. Although the second direction is illustrated as being perpendicular to the first direction, this is not intended to be limiting.
The anti-reflective films (Si-BARC 8b, BARC 7b) are etched using the PR 9b as a mask (FIG. 3 (d1)). The upper side at this time is shown in FIG. 3 (d2). As shown in these figures, the surface of the P-SiN 5 is exposed inside the opening.
In sequence, the P-OX 6L is etched second. At this time, over-etching is performed likewise. However, the surface of the P-SiN 5 that is exposed inside the opening is also exposed to the first P-OX etching. Therefore, in some cases, the a-C film 4 that is a layer under the P-SiN 5 may be exposed due to a total of 2 times of etching. In this state, the residual anti-reflective films are removed by ashing in the same fashion as above. Then, a part of the a-C film 4 is exposed to ashing gas (O2 gas), thereby forming a defect 4-d (see FIG. 3 (e1) and FIG. 3 (e2), which is a side view of FIG. 3 (e1)). In particular, this defect tends to occur in the portion in which the opening pattern of an end of cell arrays (mat) spreads out (an area in which a wide device-isolation trench is formed).
The exposed P-SiN 5 is removed, and island-shaped mask layers (P-OX 6I and P-SiN 5I) are formed (FIG. 3 (f)). In addition, the a-C film 4, the LP-SiN 3, the T-OX 2 and the semiconductor substrate 1 are sequentially etched, thereby forming an island-shaped active region, which is surrounded by the device-isolation trench, is formed, as shown in FIG. 3 (g). However, since the film thickness of the a-C film 4 is decreased in the defect 4-d, this becomes the reason by which the device-isolation trench (1-d portion) has an abnormal shape due to the subsequent etching of the lower layered films.
In addition, recently, since more reliable pattern transfer is possible, using amorphous silicon for a hard mask instead of an amorphous carbon film is being examined. However, the surface of amorphous silicon also deteriorates into silicon oxide when exposed to an oxygen atmosphere during ashing of the anti-reflective film. This makes it impossible to transfer a desired shape.
The foregoing problems are not limited to the case in which an island-shaped active region is formed, but can occur when patterning a hard mask which contains a material such as an amorphous carbon film, in which the pattern precision is degraded by oxidation, using a mask material that is processed by a double patterning technology. Therefore, it is demanded to overcome these problems.